Introduction
Getting Started
Xilinx 7-Series Architecture
Database Development Process
Output Formats
The package_pins.csv is a simple file that describes the pins of the particular FPGA chip package.
package_pins.csv
Every row in the file represents a single pin. Each of the pins is characterized by:
pin - The package pin name
pin
bank - The ID of IO BANK to which the pin is connected. It should match with the data from the part file
bank
site - The site to which the pin belongs
site
tile - The tile to which the pin belongs
tile
pin_function - The function of the pin
pin_function
A1,35,IOB_X1Y97,RIOB33_X43Y97,IO_L1N_T0_AD4N_35
This line means that the pin A1 which belongs to IO BANK 35, of IOB_X1Y97 site in RIOB33_X43Y97 tile has IO_L1N_T0_AD4N_35 function.
A1
35
IOB_X1Y97
RIOB33_X43Y97
IO_L1N_T0_AD4N_35
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