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Xilinx 7-series Architecture

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  • Configuration
  • Bitstream format
  • Glossary
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Index

B | C | F | H | N | P | S | T | W

B

  • basic element
  • basic logic element
  • BEL
  • bitstream
  • BLE

C

  • CLB
  • clock domain
  • column
  • configurable logic block

F

  • frame

H

  • half
  • horizontal clock row

N

  • node

P

  • PIP
  • programmable interconnect point

S

  • site
  • slice

T

  • tile

W

  • wire
  • word

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