Introduction
Getting Started
Xilinx 7-Series Architecture
PIPs
Database Development Process
Output Formats
The package_pins.csv is a simple file that describes the pins of the particular FPGA chip package.
package_pins.csv
Every row in the file represents a single pin. Each of the pins is characterized by:
pin
bank
site
tile
pin_function
This line means that the pin A1 which belongs to IO BANK 35, of IOB_X1Y97 site in RIOB33_X43Y97 tile has IO_L1N_T0_AD4N_35 function.
A1
35
IOB_X1Y97
RIOB33_X43Y97
IO_L1N_T0_AD4N_35
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